My PhD research focuses on efficient deep learning inference on FPGA-based edge platforms, emphasizing hardware-aware quantization and accelerator design. The project builds on previous work in fixed-point quantization and tiled CNN acceleration, and the next phase extends this research toward transformer-based models. The research will investigate how to adapt transformer workloads for FPGA deployment through quantization, workload characterization, and model--hardware co-design. It will pay particular attention to the interaction between numerical precision, memory behavior, computational structure, and accelerator efficiency. The aim is to identify implementation strategies that improve performance and resource efficiency while preserving model accuracy. The project will contribute practical methods for deploying modern deep learning models on resource-constrained FPGA platforms and is part of my doctoral studies at Mälardalen University. Main supervisor: Masoud Daneshtalab, Mälardalen University.